The present invention relates to image decoding with reduced dynamic range.
Existing video coding standards, such as H.264/AVC, generally provide relatively high coding efficiency at the expense of increased computational complexity. As the computational complexity increases, the encoding and/or decoding speeds tend to decrease. Also, the desire for increased higher fidelity tends to increase over time which tends to require increasingly larger memory requirements and increasingly larger memory bandwidth requirements. The increasing memory requirements and the increasing memory bandwidth requirements tends to result in increasingly more expensive and computationally complex circuitry, especially in the case of embedded systems.
Referring to FIG. 1, many decoders (and encoders) receive (and encoders provide) encoded data for blocks of an image. Typically, the image is divided into blocks and each of the blocks is encoded in some manner, such as using a discrete cosine transform (DCT), and provided to the decoder. The decoder receives the encoded blocks and decodes each of the blocks in some manner, such as using an inverse discrete cosine transform. In many cases, the decoding of the image coefficients of the image block is accomplished by matrix multiplication. The matrix multiplication may be performed for a horizontal direction and the matrix multiplication may be performed for a vertical direction. By way of example, for 8-bit values, the first multiplication can result in 16-bit values, and the second multiplication can result in 24-bit values in some cases. In addition, the encoding of each block of the image is typically quantized, which maps the values of the encoding to a smaller set of quantized coefficients used for transmission. Quantization requires de-quantization by the decoder, which maps the set of quantized coefficients used for transmission to approximate encoding values. The number of desirable bits for de-quantized data is a design parameter. The potential for large values resulting from the matrix multiplication and the de-quantization operation is problematic for resource constrained systems, especially embedded systems.
The foregoing and other objectives, features, and advantages of the invention will be more readily understood upon consideration of the following detailed description of the invention, taken in conjunction with the accompanying drawings.